PD178002_15 Datasheet, PDF (17/50 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCONTROLLERS

µPD178002, 178003
5.2 Clock Generator
The instruction execution time can be changed as follows.
0.44 µs/0.88 µs/1.78 µs/3.56 µs/7.11 µs/14.22 µs (4.5 MHz crystal resonator for system clock.)
Figure 5-1. Clock Generator Block Diagram
Prescaler
Clock to the PLL
frequency synthesizer,
basic timer, and buzzer
output control circuit.
X1
System fX
Clock to peripheral
X2
clock
oscillator
Frequency
Selector
fXX
Prescaler
divider
fXX fXX fXX fXX
2 2² 2³ 2⁴
hardware other than
the above.
fX
STOP
2
Selector
Standby
control
circuit
Wait control
circuit
CPU clock
(fCPU)
To INTP0
sampling clock
5.3 Timer
Three timer channels are incorporated.
• Basic timer:
1 channel
• 8-bit timer/event counter:
2 channels
Figure 5-2. Basic Timer Block Diagram
4.5 MHz
Frequency
divider
INTTMC
Data Sheet U12628EJ3V0DS00
15