DF2138AFA20 Datasheet, PDF (151/1063 Pages) Renesas Technology Corp – Old Company Name in Catalogs and Other Documents

Section 4 Exception Handling
Fetch of
Vector Internal first program
fetch processing instruction
φ
RES
Internal
address bus
Internal read
signal
Internal write
signal
(1)
(3)
High
Internal data
bus
(2)
(4)
(1) Reset exception vector address ((1) = H'0000)
(2) Start address (contents of reset exception vector address)
(3) Start address ((3) = (2))
(4) First program instruction
Figure 4.2 Reset Sequence (Mode 3)
Rev. 4.00 Jun 06, 2006 page 95 of 1004
REJ09B0301-0400