R8C29 Datasheet, PDF (141/471 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MCU R8C FAMILY / R8C/2x SERIES

R8C/28 Group, R8C/29 Group
12. Interrupts
12.5 Timer RC Interrupt, Clock Synchronous Serial I/O with Chip Select
Interrupts, and I²C bus Interface Interrupt (Interrupts with Multiple Interrupt
Request Sources)
The timer RC interrupt, clock synchronous serial I/O with chip select interrupt, and I²C bus interface interrupt each
have multiple interrupt request sources. An interrupt request is generated by the logical OR of several interrupt
request factors and is reflected in the IR bit in the corresponding interrupt control register. Therefore, each of these
peripheral functions has its own interrupt request source status register (status register) and interrupt request source
enable register (enable register) to control the generation of interrupt requests (change the IR bit in the interrupt
control register). Table 12.9 lists the Registers Associated with Timer RC Interrupt, Clock Synchronous Serial I/O
with Chip Select Interrupt, and I²C bus Interface Interrupt and Figure 12.19 shows a Block Diagram of Timer RC
Interrupt.
Table 12.9 Registers Associated with Timer RC Interrupt, Clock Synchronous Serial I/O with
Chip Select Interrupt, and I²C bus Interface Interrupt
Timer RC
Clock synchronous serial
I/O with chip select
I²C bus interface
Status Register of
Interrupt Request Source
TRCSR
SSSR
ICSR
Enable Register of
Interrupt Control
Interrupt Request Source
Register
TRCIER
TRCIC
SSER
SSUIC
ICIER
IICIC
IMFA bit
IMIEA bit
IMFB bit
IMIEB bit
IMFC bit
IMIEC bit
IMFD bit
IMIED bit
OVF bit
OVIE bit
IMFA, IMFB, IMFC, IMFD, OVF: Bits in TRCSR register
IMIEA, IMIEB, IMIEC, IMIED, OVIE: Bits in TRCIER register
Figure 12.19 Block Diagram of Timer RC Interrupt
Timer RC
interrupt request
(IR bit in TRCIC register)
Rev.2.10 Sep 26, 2008 Page 124 of 441
REJ09B0279-0210