H83297 Datasheet, PDF (134/393 Pages) Renesas Technology Corp – Single-Chip Microcomputer

7.7.2 Register Configuration and Descriptions
Table 7-12 summarizes the port 6 registers.
Table 7-12 Port 6 Registers
Name
Port 6 data direction register
Port 6 data register
Abbreviation
P6DDR
P6DR
Read/Write
W
R/W
Initial Value
H'00
H'00
Address
H'FFB9
H'FFBB
Port 6 Data Direction Register (P6DDR)
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
P6₇DDR P6₆DDR P6₅DDR P6₄DDR P6₃DDR P6₂DDR P6₁DDR P6₀DDR
0
0
0
0
0
0
0
0
W
W
W
W
W
W
W
W
P6DDR is an 8-bit readable/writable register that controls the input/output direction of each pin in
port 6. A pin functions as an output pin if the corresponding P6DDR bit is set to 1, and as an input
pin if this bit is cleared to 0.
P6DDR is a write-only register. Read data is invalid. If read, all bits always read 1.
P6DDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its existing values, so if a transition to software standby mode occurs while a P6DDR bit is
set to 1, the corresponding pin remains in the output state.
If a transition to software standby mode occurs while port 6 is being used by an on-chip supporting
module (for example, for 8-bit timer output), the on-chip supporting module will be initialized, so
the pin will revert to general-purpose input/output, controlled by P6DDR and P6DR.
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