H8S2282 Datasheet, PDF (130/615 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family/H8S/2200 Series

Section 6 Bus Controller
6.1.4 On-Chip PWM, LCD, Ports H and J Module Access Timing
On-chip PWM, LCD, Ports H and J module access timing is performed in four states. The data bus
width is 16 bits. PWM, LCD, Ports H and J module access timing is shown in figure 6.4.
φ
Internal address bus
PWM, LCD, ports H
Read ^{and J read signal}
access
Internal data bus
PWM, LCD, ports H
Write ^{and J write signal}
access _{Internal data bus}
Bus cycle
T1
T2
T3
T4
Address
Read data
Write data
Figure 6.4 On-Chip PWM, LCD, Ports H and J Module Access Cycle
Rev. 3.00 Sep 26, 2006 page 98 of 580
REJ09B0148-0300