M66592FP Datasheet, PDF (123/127 Pages) Renesas Technology Corp – ASSP (USB2.0 Peripheral Controller)

M66592FP/WG
4.9.6 DMA access timing(burst transfer, when a multiplex bus is set)
4.9.6.1 DMA burst transfer write timing (CPU multiplex bus setting: DFORM=000)
DREQi_N
(i=0, 1)
tsu (A - ALE) _{thw (A - ALE)}
32
AD6-AD1 /
D15-D0
Address
D0
35 43 tsu (D) th (D) 44
Address
D1
tw (ALE)
36
ALE
tw (cycle)
47
17 tdis (CTRL - Dreq)
18 ^{tdis (CTRLH - Dreq)}
Address
Dn
CS_N
Note 6-3
tdwr (ALE_CTRL) 37
48
tw (CTRL_B)
trec (CTRL_B) 49
WR0_N,
WR1_N
Note 6-1
DENDi_N
(i=0, 1)
46
45 ^{tsu (DEND) th (DEND)}
4.9.6.2 DMA burst transfer read timing(CPU multiplex bus setting: DFORM=000)
DREQi_N
(i=0, 1)
AD6-AD1 /
D15-D0
tsu (A - ALE) _{th (A - ALE) 35}
32
Address
D0
3 ^{ta (CTRL-D)}
Address
D1
tw (ALE)
tw (cycle) ⁴⁷
ALE ³⁶
17 ^{tdis (CTRL - Dreq)}
tv (CTRL-D) 4
Address
Dn
CS_N
Note 6-3
48
tdwr (ALE_CTRL) ³⁷
tw (CTRL_B)
trec (CTRL_B) ⁴⁹
RD_N
Note 6-2
11 ^{ta (CTRL - DendV)}
DENDi_N
(i=0, 1)
Note 6-4
tv (CTRL - DendV) 12
Rev1.00 2004.10.01 page 123 of 125