R1EX25512ASA00I_15 Datasheet, PDF (10/22 Pages) Renesas Technology Corp – Serial Peripheral Interface 512K EEPROM (64-Kword × 8-bit)

R1EX25512ASA00I/R1EX25512ATA00I
Write Enable (WREN):
The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this is
to send a Write Enable instruction to the device. As shown in the following figure, to send this instruction to the device,
chip select (S) is driven low, and the bits of the instruction byte are shifted in, on serial data input (D). The device then
enters a wait state. It waits for the device to be deselected, by chip select (S) being driven high.
Write Enable (WREN) Sequence
V_IH
S
V_IL
V_IH
W
V_IL
V_IH
C
V_IL
V_IH
D
V_IL
Q
0 123 456 7
Instruction
High-Z
R10DS0044EJ0100 Rev.1.00
Oct.04, 2010
Page 10 of 20