HYS72T64000HP-25F Datasheet, PDF (5/65 Pages) Qimonda AG – 240-Pin Registered DDR2 SDRAM Modules

Internet Data Sheet
HYS72T[64/128/256]xxxHP–[25F/2.5/3/3S/3.7]–B
240-Pin Registered DDR2 SDRAM
2) The Compliance Code is printed on the module label and describes the speed grade, for example “PC2–4200R–444–12–F0”, where 4200P
means Registered DIMM modules (with Parity Bit) with 4.26 GB/sec Module Bandwidth and “444-12” means Column Address Strobe
(CAS) latency = 4, Row Column Delay (RCD) latency = 4 and Row Precharge (RP) latency = 4 using the latest JEDEC SPD Revision 1.2
and produced on the Raw Card “F”
DIMM
Density
512 MB
1 GB
1 GB
2 GB
2 GB
Module
Organization
64M ×72
128M ×72
128M ×72
256M ×72
256M ×72
Memory
Ranks
1
1
2
2
2
ECC/
Non-ECC
ECC
ECC
ECC
ECC
ECC
TABLE 3
Address Format Table
# of SDRAMs # of row/bank/column
bits
Raw
Card
9
14/2/10
F
18
14/2/11
H
18
14/2/10
G
36
14/2/11
J
36
14/2/11
L
Product Type¹⁾
DRAM Components¹⁾²⁾
DRAM Density
TABLE 4
Components on Modules
DRAM Organisation
HYS72T64000HP
HYB18T512800BF
512 Mbit
512M × 8
HYS72T128000HP
HYB18T512400BF
512 Mbit
512M × 4
HYS72T128020HP
HYB18T512800BF
512 Mbit
512M × 8
HYS72T256220HP
HYB18T512400BF
512 Mbit
512M × 4
1) Green Product
2) For a detailed description of all functionalities of the DRAM components on these modules see the component data sheet.
Rev. 1.1, 2007-03
5
03292006-EO3M-LEK7