HYS64T256020HU Datasheet, PDF (47/61 Pages) Qimonda AG – 240-Pin Unbuffered DDR2 SDRAM Modules

Internet Data Sheet
HYS[64/72]T256xxxHU–[3/…/5]–A
Unbuffered DDR2 SDRAM Modules
Product Type
Organization
Label Code
JEDEC SPD Revision
Byte#
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
Description
Programmed SPD Bytes in EEPROM
Total number of Bytes in EEPROM
Memory Type (DDR2)
Number of Row Addresses
Number of Column Addresses
DIMM Rank and Stacking Information
Data Width
Not used
Interface Voltage Level
t_CK @ CL_MAX (Byte 18) [ns]
t_AC SDRAM @ CL_MAX (Byte 18) [ns]
Error Correction Support (non-ECC, ECC)
Refresh Rate and Type
Primary SDRAM Width
Error Checking SDRAM Width
Not used
Burst Length Supported
Number of Banks on SDRAM Device
Supported CAS Latencies
DIMM Mechanical Characteristics
DIMM Type Information
DIMM Attributes
Component Attributes
t_CK @ CL_MAX -1 (Byte 18) [ns]
t_AC SDRAM @ CL_MAX -1 [ns]
t_CK @ CL_MAX -2 (Byte 18) [ns]
t_AC SDRAM @ CL_MAX -2 [ns]
t_RP.MIN [ns]
t_RRD.MIN [ns]
t_RCD.MIN [ns]
Rev. 1.32, 2006-09
03062006-5RK8-1X8J
TABLE 30
SPD codes for HYS64T256020HU–3.7–A
HYS64T256020HU–3.7–A HYS72T256020HU–3.7–A
2 GByte
2 GByte
×64
×72
2 Ranks (×8)
2 Ranks (×8)
PC2–4200U–444
PC2–4200E–444
Rev. 1.1
Rev. 1.1
HEX
80
08
08
0E
0A
61
40
00
05
3D
50
00
82
08
00
00
0C
08
38
00
02
00
01
3D
50
50
60
3C
1E
3C
HEX
80
08
08
0E
0A
61
48
00
05
3D
50
02
82
08
08
00
0C
08
38
00
02
00
01
3D
50
50
60
3C
1E
3C
47