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HYS64D32020 Datasheet, PDF (4/34 Pages) Qimonda AG – 200-Pin Small Outline Dual-In-Line Memory Modules | |||
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Internet Data Sheet
HYS64D[32/16]0x0[G/H]DLâ[5/6]âC
Small-Outline DDR SDRAM Modules
1.2
Description
The
HYS64D32020[H/G]DLâ5âC
and
HYS64D[32/16]0x0[H/G]DLâ6âC are industry standard
200-Pin Small Outline Dual-In-Line Memory Modules (SO-
DIMMs) organized as 32M Ã 64. The memory array is
designed with Double Data Rate Synchronous DRAMs (DDR
SDRAM). A variety of decoupling capacitors are mounted on
the PC board. The DIMMs feature serial presence detect
based on a serial E2PROM device using the 2-Pin I2C
protocol. The first 128 bytes are programmed with
configuration data and the second 128 bytes are available to
the customer.
Product Type
PC3200 (CL=3.0)
HYS64D32020GDLâ5âC
PC2700 (CL=2.5)
HYS64D16000GDLâ6âC
HYS64D32020GDLâ6âC
Compliance Code
TABLE 2
Ordering Information for Lead Containing Products
Description
SDRAM Technology
PC3200Sâ3033â1âA1 two ranks 256 MB SO-DIMM
PC2700Sâ2533â0âC1
PC2700Sâ2533â0âA1
one rank 128 MB SO-DIMM
two ranks 256 MB SO-DIMM
256 Mbit (Ã16)
256 Mbit (Ã16)
256 Mbit (Ã16)
Product Type1)
Compliance Code
TABLE 3
Ordering Information for RoHS Compliant Products
Description
SDRAM Technology
PC3200 (CL=3.0)
HYS64D32020HDLâ5âC
PC3200Sâ3033â1âA1 two ranks 256 MB SO-DIMM
256 Mbit (Ã16)
PC2700 (CL=2.5)
HYS64D16000HDLâ6âC
PC2700Sâ2533â0âC1 one rank 128 MB SO-DIMM
256 Mbit (Ã16)
HYS64D32020HDLâ6âC
PC2700Sâ2533â0âA1 two ranks 256 MB SO-DIMM
256 Mbit (Ã16)
1) RoHS Compliant Product: Restriction of the use of certain hazardous substances (RoHS) in electrical and electronic equipment as defined
in the directive 2002/95/EC issued by the European Parliament and of the Council of 27 January 2003. These substances include mercury,
lead, cadmium, hexavalent chromium, polybrominated biphenyls and polybrominated biphenyl ethers.
Notes
1. Allproduct types end with a place code designating the silicon-die revision. Reference information available on request.
Example: HYS64D32020GDL-6-C, indicating rev. C dies are used for SDRAM components.
2. The Compliance Code is printed on the module labels describing the speed sort (for example âPC2700â), the latencies and
SPD code definition (for example â2033â0â means CAS latency of 2.0 clocks, RCD1) latency of 3 clocks, Row Precharge
latency of 3 clocks, and JEDEC SPD code definiton version 0), and the Raw Card used for this module.
1) RCD: Row-Column-Delay
Rev. 1.31, 2006-09
4
03292006-VN6D-DETI
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