HYS72T64301HP Datasheet, PDF (31/42 Pages) Qimonda AG – 240-Pin Registered DDR2 SDRAM Modules

Product Type
Internet Data Sheet
HYS72T64301HP–[3S/3.7]–A
Registered DDR2 SDRAM Modules
Organization
Label Code
JEDEC SPD Revision
Byte#
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Description
t_RFC.MIN [ns]
t_CK.MAX [ns]
t_DQSQ.MAX [ns]
t_QHS.MAX [ns]
PLL Relock Time
T_CASE.MAX Delta / ∆T_4R4W Delta
Psi(T-A) DRAM
∆T₀ (DT0)
∆T_2N (DT2N, UDIMM) or ∆T_2Q (DT2Q, RDIMM)
∆T_2P (DT2P)
∆T_3N (DT3N)
∆T_3P.fast (DT3P fast)
∆T_3P.slow (DT3P slow)
∆T_4R (DT4R) / ∆T_4R4W Sign (DT4R4W)
∆T_5B (DT5B)
∆T₇ (DT7)
Psi(ca) PLL
Psi(ca) REG
∆T_PLL (DTPLL)
∆T_REG (DTREG) / Toggle Rate
SPD Revision
Checksum of Bytes 0-62
Manufacturer’s JEDEC ID Code (1)
Manufacturer’s JEDEC ID Code (2)
Manufacturer’s JEDEC ID Code (3)
Manufacturer’s JEDEC ID Code (4)
Manufacturer’s JEDEC ID Code (5)
256MB
512MB
512MB
×72
×72
×72
1 Rank (×8)
1 Rank (×8)
2 Ranks (×8)
PC2–5300P–555 PC2–5300P–555 PC2–5300P–555
Rev. 1.2
Rev. 1.2
Rev. 1.2
HEX
4B
80
18
22
0F
52
82
43
25
29
25
2F
19
44
17
22
C4
8C
68
94
12
D5
7F
7F
7F
7F
7F
HEX
69
80
18
22
0F
53
78
4B
2E
26
26
2B
1B
4A
20
22
C4
8C
68
94
12
47
7F
7F
7F
7F
7F
HEX
4B
80
18
22
0F
52
82
43
25
29
25
2F
19
44
17
22
C4
8C
68
94
12
D7
7F
7F
7F
7F
7F
Rev. 1.0, 2006-10
31
09152006-R5MQ-5KS2