HYS72T1G042ER Datasheet, PDF (24/31 Pages) Qimonda AG – 240-Pin Dual Die Registered DDR2 SDRAM Modules

Product Type
Internet Data Sheet
HYS72T1G042ER–5–B
Registerd DDR2 SDRAM Module
Organization
Label Code
JEDEC SPD Revision
Byte#
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
Description
t_CK.MAX [ns]
t_DQSQ.MAX [ns]
t_QHS.MAX [ns]
PLL Relock Time
T_CASE.MAX Delta / ∆T_4R4W Delta
Psi(T-A) DRAM
∆T₀ (DT0)
∆T_2N (DT2N, UDIMM) or ∆T_2Q (DT2Q, RDIMM)
∆T_2P (DT2P)
∆T_3N (DT3N)
∆T_3P.fast (DT3P fast)
∆T_3P.slow (DT3P slow)
∆T_4R (DT4R) / ∆T_4R4W Sign (DT4R4W)
∆T_5B (DT5B)
∆T₇ (DT7)
Psi(ca) PLL
Psi(ca) REG
∆T_PLL (DTPLL)
∆T_REG (DTREG) / Toggle Rate
SPD Revision
Checksum of Bytes 0-62
Manufacturer’s JEDEC ID Code (1)
Manufacturer’s JEDEC ID Code (2)
Manufacturer’s JEDEC ID Code (3)
Manufacturer’s JEDEC ID Code (4)
Manufacturer’s JEDEC ID Code (5)
Manufacturer’s JEDEC ID Code (6)
Rev. 1.0, 2007-04
24
04242007-NQ2Z-YM3O
8 GByte
×72
4 Ranks (×4)
PC2–3200R–333
Rev. 1.2
HEX
80
23
2D
0F
50
00
00
00
00
00
00
00
00
00
00
00
00
00
00
12
46
7F
7F
7F
7F
7F
51