HYB39S128400F Datasheet, PDF (13/21 Pages) Qimonda AG – 128-MBit Synchronous DRAM

Data Sheet
HY[B/I]39S128[40/80/16][0/7]F[E/T](L)
128-MBit Synchronous DRAM
TABLE 9
DC Characteristics
Parameter
Symbol
Values
Min. Max.
Unit Note/
Test Condition
Supply Voltage
V_DD
3.0 3.6
V
1)2)
I/O Supply Voltage
V_DDQ 3.0 3.6
V
1)2)
Input high voltage
V_IH
2.0 V_DDQ+0.3 V
1)2)3)
Input low voltage
V_IL
– 0.3 +0.8
V
1)2)3)
Output high voltage (I_OUT = – 4.0 mA)
V_OH
2.4 –
V
1)2)
Output low voltage (I_OUT = 4.0 mA)
V_OL
– 0.4
V
1)2)
Input leakage current, any input(0 V < V_IN < V_DD, all other inputs = 0 V) I_IL
– 5 +5
μA ¹⁾
Output leakage current(DQs are disabled, 0 V < V_OUT < V_DDQ)
I_OL
– 5 +5
μA ¹⁾
1) T_A = 0 to 70 ºC
2) All voltages are referenced to V_SS
3) V_IH may overshoot to V_DDQ + 2.0 V for pulse width of < 4ns with 3.3 V. V_IL may undershoot to -2.0 V for pulse width < 4.0 ns with 3.3 V.
Pulse width measured at 50% points with amplitude measured peak to DC reference.
Parameter
Symbol
TABLE 10
Input and Output Capacitances
Values¹⁾
Unit Note
Min.
Max.
Input Capacitances: CK
Input Capacitance
(A0-A11, BA0, BA1, RAS, CAS, WE, CS, CKE, DQM)
C_I1
2.5
3.5
pF
2)
C_I2
2.5
3.8
pF
2)
Input/Output Capacitance (DQ)
C_I0
4.0
6.0
pF
2)
1) Capacitance values are shown for TSOP-54 packages. Capacitance values for TFBGA packages are lower by 0.5 pF
2) T_A = 0 to 70 ºC; V_DD,V_DDQ = 3.3 V ± 0.3 V, f = 1 MHz
Rev. 1.32, 2007-10
13
10122006-I6LJ-WV3H