HYS64D64300GU-5-B Datasheet, PDF (12/42 Pages) Qimonda AG – 42184-Pin Unbuffered Double-Data-Rate Memory Modules

Internet Data Sheet
HYS[64/72]D[32/64/128]xxx[G/H]U–[5/6]–B
Unbuffered DDR SDRAM Modules
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
TABLE 4
Abbreviations for Pin Type
Abbreviation
SSTL
LV-CMOS
CMOS
OD
TABLE 5
Abbreviations for Buffer Type
Description
Serial Stub Terminated Logic (SSTL2)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR.
Density Organization
256 MB
512 MB
512 MB
1 GB
1 GB
32M ×64
64M ×64
64M ×72
128M ×64
128M ×72
Memory
Ranks
1
1
1
2
2
SDRAMs
32M ×16
64M ×8
64M ×8
64M ×8
64M ×8
# of
SDRAMs
4
8
8
16
18
# of row/bank/
columns bits
13 /2 / 9
13 /2 / 11
13 /2 / 11
13 / 2 / 12
13 / 2 / 12
Refresh
TABLE 6
Address Format
Period Interval
8K
64 ms 7.8 ms
8K
64 ms 7.8 ms
8K
64 ms 7.8 ms
8K
64 ms 7.8 ms
8K
64 ms 7.8 ms
Rev. 1.22, 2007-01
12
03292006-CXBY-V2JX