PACE1750A Datasheet, PDF (17/24 Pages) Pyramid Semiconductor Corporation – SINGLE CHIP, 15MHz to 40MHz, CMOS 16-BIT PROCESSOR

TERMINAL CONNECTIONS
Case Outlines: Dual-In-Line (Case X) and Dual-In-Line with Gull-Wing Leads (Case T)
Terminal
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Terminal
Symbol
GND
CON REQ
DMA EN
TRIGO RST
RESET
NML PWRUP
TIMER CLK
UNRCV ER
IB₀
IB₁
IB₂
IB₃
IB₄
IB₅
IB₆
IB₇
IB₈
IB₉
VCC
IB₁₀
IB₁₁
IB₁₂
Terminal
Number
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
Terminal
Symbol
IB₁₃
IB₁₄
IB₁₅
MEM PRT ER
MEM PAR ER
EXT ADR ER
SYSFLT₀
SYSFLT₁
MAJ ER
GND
PWRDN INT
USR₀INT
USR₁INT
USR₂INT
USR₃INT
USR₄INT
USR₅INT
IOL₁INT
IOL₂INT
AS₃
AS₂
Terminal
Number
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
PACE1750A
Terminal
Symbol
AS₁
AS₀
GND
AK₃
AK₂
AK₁
AK₀
CPU CLK
STRBA
STRBD
BUS REQ
RDYA
RDYD
R/W
D/I
M/IO
BUS BUSY
BUS GNT
BUS LOCK
SNEW
VCC
Note: For the 30 MHz and 40 MHz devices, Pins 19 and 46 are connected as shown. For the 15 MHz and 20 MHz devices, these pins are not internally connected to the die.
Document # MICRO-3 Rev. C
Page 17 of 24