PACE1750A Datasheet, PDF (10/24 Pages) Pyramid Semiconductor Corporation – SINGLE CHIP, 15MHz to 40MHz, CMOS 16-BIT PROCESSOR

PACE1750A
EXTERNAL FAULTS AND INTERRUPTS TIMING DIAGRAM
Edge-sensitive interrupts and faults (SYSFLT₀,
SYSFLT₁) min. pulse width
Level-sensitive interrupts
Level-sensitive faults
Note:
tC(IR)_X max = 35 clocks
CON REQ
Note:
All time measurements on active signals relate to the 1.5 volt level.
Document # MICRO-3 Rev. C
Page 10 of 24