PT6332 Datasheet, PDF (25/37 Pages) Princeton Technology Corp – VFD Driver/Controller IC

VFD Driver/Controller IC
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PT6332
OUTPUT PIN STATES DURING THE RESET PERIOD
(when /BLK is low)
Output Pin
SG1 to SG56
GR1 to GR3
KS1 to KS4
KS5
DO
State during Reset
L
L
X *1
H
H *2
Notes:
1. The state of this pin is undefined after power has been applied until the sleep control data (S0 to S1)
are transferred.
2. Since this pin is an open-drain output, a pull-up resistor (between 1 and 10KΩ) is required. It
remains high during the reset period even if the controller attempts to read the key data.
NOTE ON THE SEGMENT AND DIGIT WAVEFORMS
Digit wa ve form
Segment w aveform 1
Segment w aveform 2
Figure 8
The digit waveform is somewhat deformed due to the VFD panel itself and the circuit wiring.
Furthermore, if a segment waveform such as segment waveform 1 in which no dimming is applied is
used, the display will glow dimly. Therefore, applications must take this waveform deformation into
account and apply adequate dimming such as that shown in segment waveform 2 so that this
phenomenon does not occur.
NOTE ON CONTROLLER TRACSFER OF DISPLAY DATA
Since the display data is transferred in three operations as shown in figures 1 & 2, we strongly
recommend that applications transfer all the data within a 30ms period to assure display quality.
PT6332 V1.0
- 25 -
February, 2006