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PT6332 Datasheet, PDF (17/37 Pages) Princeton Technology Corp – VFD Driver/Controller IC
VFD Driver/Controller IC
Key Input 1
Key Input 2
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Fax: 886-2-29174598
URL: http://www.princeton.com.tw
PT6332
Key scan
38 400 T[s]
38 400 T[s]
CE
Se rial da ta tran sfe r Se rial da ta tran sfe r Ke y ad dre ss (8FH) Se rial da ta tran sfe r
DI
38 400 T[s]
Ke y ad dre ss
Ke y ad dre ss
DO
Ke y da ta r ead
Ke y da ta r ead re que st
Ke y da ta r ead
Ke y da ta r ead re que st
Ke y da ta r ead
Ke y da ta r ead re que st
T=
1
fosc
[s]
IN SLEEP MODE
• The pins KS1 to KS5 are set to high or low according to the values of S0 and S1 in the control data.
(see the description of the control data elsewhere in this document)
• If a key connected to one of the KS1 to KS5 lines that was set high is pressed, the clock generator
(oscillator circuit) is started and a key scan is performed, and the keys are kept scanning until all
keys are released. The controller can recognize simultaneous multiple key presses by checking
the key data for multiple bits being set.
• If a key is pressed for over 38400T [s] (where T=1/fosc), the IC outputs a key data read request to
the controller by setting DO low. The controller acknowledges this state and reads the key data.
However, note that DO will go high when CE is set high during the serial data transfer.
• After the controller key data readout completes, the key data read request will be cleared (DO will
be set high), and the IC performs another key scan. However, sleep mode will not be cleared. Note
that since DO is an open-drain output, a pull-up resistor (between 1 and 10KΩ) is required.
• Example of a key scan operation in sleep mode.
Example: Sleep mode with S1=0, S1=1 (only KS5 is set high)
PT6332 V1.0
(L) KS 1
(L) KS 2
(L) KS 3
(L) KS 4
(H) KS5
KI1
KI2
KI3
KI4
KI5
If any one of t hes e k eys is press ed,
th e o s ci l l a to r o n th e O S C p i n is s ta r t e d
and the key s are s cann ed.
∗
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February, 2006