PE9701 Datasheet, PDF (7/13 Pages) Peregrine Semiconductor Corp. – 3000 MHz UltraCMOS™ Integer-N PLL Rad Hard for Space Applications

PE9701
Product Specification
Functional Description
The PE9701 consists of a prescaler, counters, a
phase detector, a charge pump, and control logic.
The dual modulus prescaler divides the VCO
frequency by either 10 or 11, depending on the
value of the modulus select. Counters “R” and
“M” divide the reference and prescaler output,
respectively, by integer values stored in a 20-bit
register. An additional counter (“A”) is used in the
modulus select logic. The phase-frequency
Figure 4. Functional Block Diagram
detector generates up and down frequency control
signals. The control logic includes a selectable
chip interface. Data can be written via serial bus,
parallel bus, or hardwired directly to the pins.
There are also various operational and test modes
and a lock detect output.
f_r
R Counter
(6-bit)
f_c
D(7:0)
Sdata
Control
Pins
Control
Logic
R(5:0)
M(8:0)
A(3:0)
Modulus
Select
F_in
10/11
Fin
Prescaler
M Counter
(9-bit)
Phase
Detector
PD_U
Charge
PD_D _Pump
CP
LD
Cext
2 kΩ
f_p
Document No. 70-0035-02 │ www.psemi.com
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
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