PE9701 Datasheet, PDF (2/13 Pages) Peregrine Semiconductor Corp. – 3000 MHz UltraCMOS™ Integer-N PLL Rad Hard for Space Applications

PE9701
Product Specification
Figure 2. Pin Configurations (Top View)
Figure 3. Package Type
44-lead CQFJ
D₀, M₀
D₁, M₁
D₂, M₂
D₃, M₃
V_DD
V_DD
S_W R, D₄, M₄
Sdata, D₅, M₅
Sclk, D₆, M₆
FSELS, D₇, Pre_en
GND
6 5 4 3 2 1 44 43 42 41 40
7
39
8
38
9
37
10
36
11
35
12
34
13
33
14
32
15
31
16
30
17
29
18 19 20 21 22 23 24 25 26 27 28
f_c
V_DD_f_c
N/C
CP
V_DD
C_ext
V_DD
D_out
V_DD_f_p
f_p
GND
Table 1. Pin Descriptions
Pin No. Pin Name Interface Mode
1
VDD
ALL
2
R0
Direct
3
R1
Direct
4
R2
Direct
5
R3
Direct
6
GND
ALL
D0
7
M0
8
D1
M1
9
D2
M2
10
D3
M3
11
VDD
12
VDD
Parallel
Direct
Parallel
Direct
Parallel
Direct
Parallel
Direct
ALL
ALL
Type
(Note 1)
Input
Input
Input
Input
(Note 1)
Input
Input
Input
Input
Input
Input
Input
Input
(Note 1)
(Note 1)
S_WR
Serial
13
D4
Parallel
M4
Direct
Input
Input
Input
Description
Power supply input. Input may range from 2.85 V to 3.15 V. Bypassing
recommended.
R Counter bit0 (LSB).
R Counter bit1.
R Counter bit2.
R Counter bit3.
Ground.
Parallel data bus bit0 (LSB).
M Counter bit0 (LSB).
Parallel data bus bit1.
M Counter bit1.
Parallel data bus bit2.
M Counter bit2.
Parallel data bus bit3.
M Counter bit3.
Same as pin 1.
Same as pin 1.
Serial load enable input. While S_WR is “low”, Sdata can be serially clocked.
Primary register data is transferred to the secondary register on S_WR or Hop_WR
rising edge.
Parallel data bus bit4
M Counter bit4
©2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 13
Document No. 70-0035-02 │ UltraCMOS™ RFIC Solutions