PE97632 Datasheet, PDF (5/15 Pages) List of Unclassifed Manufacturers – 3.2 GHz Delta-Sigma modulated Fractional-N Frequency Synthesizer for Low Phase Noise Applications

PE97632
Product Specification
Table 2. Absolute Maximum Ratings
Symbol Parameter/Conditions Min Max
V_DD
Supply voltage
V_I
Voltage on any input
-0.3 4.0
-0.3
V_DD +
0.3
I_I
DC into any input
I_O
DC into any output
θ_JC
Theta JC
T_stg
Storage temperature
range
-10 +10
-10 +10
12
-65 150
Units
V
V
mA
mA
°C/W
°C
Table 3. Operating Ratings
Symbol
V_DD
T_A
Parameter/Conditions
Supply voltage
Operating ambient
temperature range
Min Max Units
2.85 3.45
V
-40
85
°C
Table 4. ESD Ratings
Symbol
Parameter/Conditions
Level Units
ESD Voltage Human Body Model
on all pins except pin 52¹
1000
V
V_ESD
ESD Voltage Human Body Model
on pin 52^1,2
300
V
Notes 1. Periodically sampled, not 100% tested. Tested per MIL-STD-883,
M3015 C2.
2. Pin 52 is a test pin only. It is not used in normal operation.
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 4.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 5. DC Characteristics: V_DD = 3.30 V -40 °C < TA < 85 °C, unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
I_DD
Operational supply current;
Prescaler enabled
V_DD = 2.85 to 3.45 V
40
I_DD
Operational supply current;
Prescaler disabled
V_DD = 2.85 to 3.45 V
15
All Digital inputs: K[17:0], R[5:0], M[8:0], A[3:0], Direct, Pre_en, RND_SEL, MS2_SEL, Enh (contains a 70 kΩ pull-down resistor)
V_IH
High level input voltage
V_IL
Low level input voltage
I_IH
High level input current
I_IL
Low level input current
Reference Divider input: f_r
I_IHR
High level input current
I_ILR
Low level input current
V_DD = 2.85 to 3.45 V
V_DD = 2.85 to 3.45 V
V_IH = V_DD = 3.45 V
V_IL = 0, V_DD = 3.45 V
V_IH = V_DD = 3.45 V
V_IL = 0, V_DD = 3.45 V
0.7 x V_DD
-1
-100
0.3 x V_DD
100
100
Counter and phase detector outputs: PD_D, PD_U
V_OLD
Output voltage LOW
I_out = 6 mA
0.4
V_OHD
Output voltage HIGH
I_out = -3 mA
V_DD - 0.4
Digital test outputs: Dout
V_OLD
Output voltage LOW
I_out = 200 A
0.4
V_OHD
Output voltage HIGH
I_out = -200 A
V_DD - 0.4
Lock detect outputs: (Cext, LD)
V_OLC
Output voltage LOW, Cext
I_out = 0.1 mA
0.4
V_OHC
Output voltage HIGH, Cext
I_out = -0.1 mA
V_DD - 0.4
V_OLLD
Output voltage LOW, LD
I_out = 1 mA
0.4
Units
mA
mA
V
V
µA
µA
µA
µA
V
V
V
V
V
V
V
Document No. 70-0205-07 │ www.psemi.com
©2006-2011 Peregrine Semiconductor Corp. All rights reserved.
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