PE99151DIE Datasheet, PDF (2/15 Pages) Peregrine Semiconductor – Hi-Rel 2A DC-DC Converter

PE99151 DIE
Product Specification
Table 2. Electrical Specifications¹
Temp (T_A) = –55 °C to +125 °C, V_IN = 4.6–6.0V, V_OUT = 1.0–3.6V, unless otherwise noted
Parameter
Condition
Min
Typ
Max
Synchronous Frequency Range,
Fsw_range
0.1
5
Maximum Cycle-Averaged RMS
Output Current, Imax
2
Supply Current (Shutdown), IDDSD
SDb = GND, V_IN = 5.5V
SDb = GND, V_IN = 6.0V
1.8
3.2
3.1
5.5
Supply Current (No-load, 1 MHz
async), IDD0
17.5
High Side On Resistance, Ron,hss Test current = 100 mA
97
160
Low Side On Resistance, Ron,lss
Test current = 100 mA
113
190
Output Voltage
V_IN = 5.0V, I_OUT = Imax/2, –40≤ T_A ≤ +85 °C, Fsw = 100 kHz–1 MHz
–1.0
0
1.0
Reference Voltage Accuracy, Vref ²
V_IN = 5.0V, I_OUT = Imax/2, –55≤ T_A ≤ +125 °C, Fsw = 100 kHz–1 MHz –1.5
0
1.5
Reference Voltage Line Regulation,
Kvi (steady state) ²
4.6V ≤ V_IN ≤ 6.0V, I_OUT = 1A, V_OUT = 2.5V, Fsw = 1 MHz
–0.2
0
0.2
Reference Voltage Load Regulation,
Kvo (steady state) ²
V_IN = 5.0V, 500 mA ≤I_OUT ≤ 1A, V_OUT = 2.5V, Fsw = 1 MHz
–0.25
0
0.25
Internal Oscillator and SYNC Capture
Oscillator Frequency, FOSC_FREQ
Internal Oscillator Duty Cycle,
FOSC_DC
SYNC = GND
SYNC = Open or V_IN
320
530
700
0.71
1
1.42
46
54
SYNC Lock Capture Frequency,
Sync_lock
40
Unit
MHz
A
mA
mA
mΩ
mΩ
%
%
%
kHz
MHz
%
kHz
External Sync Duty Cycle, SYNC_DC
40
60
%
Current Limiting and Current Mode Control Loop
Internal Current Limit Max, ILIMXINT ²
V_OUT = 1.0V, ISET = 3.0V, ICOMP = 0V, RSEL pin shorted to ground,
not min-on-time limited
2
3
4
A
Externally Set Max Current Limit
Accuracy, ILIMXEXT ²
V_OUT = 1.0V, RSET = 130Ω, ISET = 3.0V, ICOMP = 0V, RSEL = V_IN,
not min-on-time limited
2
3
4
%
Max voltage across Rset, VMAXRSET
1.3
1.5
1.75
V
I_out/I_rset, G_Iref ²
I_OUT set for 50% rated current
300
378
450 A/A
ICOMP cap, CICOMP ²
110
pF
Current compensation gain, ICOMP
gain, G_ICOMP ²
2.3
3
4
A/V
Notes: 1. Wafer level screening is performed at +25 °C and +85 °C only. However, performance is guaranteed over the full operating temperature range based on a
population of parts that were packaged and characterized at –55 °C and +125 °C.
2. Parameter not tested at wafer level due to high current limitations of test setup.
©2012–2015 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 15
Document No. DOC-50370-6 │ UltraCMOS^® Power Management Solutions