PE97240 Datasheet, PDF (2/21 Pages) Peregrine Semiconductor – Radiation Tolerant UltraCMOS Integer-N Frequency Synthesizer for Low Phase Noise Applications

Figure 2. Pin Configurations (Top View)
PE97240
Product Specification
Figure 3. Package Type
44-lead CQFP
Table 1. Pin Descriptions
Pin #
Pin Name Interface Mode
1
V_DD
2
R4
3
R5
4
A3
5
GND
6
M3
7
M2
8
M1
9
M0
Both
Direct
Direct
Direct
Both
Direct
Direct
Direct
Direct
10
V_DD
11
GND
12
M8
13
M7
Both
Both
Direct
Direct
SCLK
14
M6
SDATA
15
M5
Serial
Direct
Serial
Direct
S_WR
16
M4
Serial
Direct
Type
Description
Note 1 Power supply input. Input may range from 2.6–2.8V. Bypassing recommended.
Input
Input
Input
Input
Input
Input
Input
R counter bit4
R counter bit5
A counter bit3
Ground
M counter bit3
M counter bit2
M counter bit1
M counter bit0
Note 1 Power supply input. Input may range from 2.6–2.8V. Bypassing recommended.
Ground
Input M counter bit8
Input M counter bit7
Input
Serial clock input. SDATA is clocked serially into the 21-bit primary register (E_WR “low”)
or the 8-bit enhancement register (E_WR “high”) on the rising edge of SCLK.
Input M counter bit6
Input Binary serial data input. Input data entered MSB first.
Input M counter bit5
Input
Serial load enable input. While S_WR is “low”, SDATA can be serially clocked. Primary
register data is transferred to the secondary register on S_WR or Hop_WR rising edge.
Input M counter bit4
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Document No. DOC-15214-7 │ UltraCMOS^® RFIC Solutions