PE97240 Datasheet, PDF (13/21 Pages) Peregrine Semiconductor – Radiation Tolerant UltraCMOS Integer-N Frequency Synthesizer for Low Phase Noise Applications

PE97240
Product Specification
Main Counter Chain
Normal Operating Mode
The main counter chain divides the RF input
frequency, F_IN, by an integer derived from the user-
defined values in the “M” and “A” counters. It is
composed of the 5/6 or 10/11 selectable modulus
prescaler, modulus select logic, and 9-bit M
counter. The prescaler can be set to either 5/6 or
10/11 based on the Pre_5/6_SEL pin. Setting
Pre_en “low” enables the 5/6 or 10/11 prescaler.
Setting Pre_en “high” allows F_IN to bypass the
prescaler and powers down the prescaler.
The output from the main counter chain, f_p, is
related to the VCO frequency, F_in, by the following
equation:
f_p = F_IN / [10 x (M + 1) + A]
(1)
where A  M + 1, 1 ≤ M ≤ 511
Or
f_p = F_IN / [5 x (M + 1) + A]
where A  M + 1, 1 ≤ M ≤ 511
When the loop is locked, F_IN is related to the
reference frequency, F_R, by the following equation:
F_IN = [10 x (M + 1) + A] x [F_R / (R + 1)] (2)
where A  M + 1, 1 ≤ M ≤ 511
Or
F_IN = [5 x (M + 1) + A] x [F_R / (R + 1)]
where A  M + 1, 1 ≤ M ≤ 511
A consequence of the upper limit on A is that in
Integer-N mode, to obtain contiguous channels,
F_IN must be = 90 x [F_R / (R + 1)] with 10/11 modulus
F_IN must be = 20 x [F_R / (R + 1)] with 5/6 modulus
The A counter can accept values as high as 15, but
in typical operation it will cycle from 0 to 9 between
increments in M. Programming the M counter with
the minimum allowed value of “1” will result in a
minimum M counter divide ratio of “2”.
Prescaler Bypass Mode
Setting Pre_en “high” allows F_IN to bypass and
power down the prescaler. In this mode, the 5/6
or 10/11 prescaler and A register are not active,
and the input VCO frequency is divided by the M
counter directly. The following equation relates
F_in to the reference frequency, F_R:
F_IN = (M + 1) x [F_R / (R + 1)] (3)
where 1 ≤ M ≤ 511
Reference Counter
The reference counter chain divides the
reference frequency, F_R, down to the phase
detector comparison frequency, f_c.
The output frequency of the 6-bit R counter is
related to the reference frequency by the
following equation:
f_c = F_R / (R + 1) (4)
where 0 ≤ R ≤ 63
Note that programming R with “0” will pass the
reference frequency, F_R, directly to the phase
detector.
Document No. DOC-15214-7 │ www.e2v-us.com
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