PE97042 Datasheet, PDF (2/11 Pages) Peregrine Semiconductor – 3.5 GHz UltraCMOS Integer-N PLL Rad Hard for Space Applications

Figure 2. Pin Configurations (Top View)
PE97042
Product Specification
Figure 3. Package Type
44-lead CQFJ
Table 1. Pin Descriptions
Pin No. Pin Name
Interface Mode
1
V_DD
2
R₀
3
R₁
4
R₂
5
R₃
6
GND
7
R₄
8
R₅
9
M₀
10
M₁
11
V_DD
Both
Direct
Direct
Direct
Direct
Both
Direct
Direct
Direct
Direct
Both
12
V_DD
Both
13
M₂
14
M₃
Direct
Direct
15
S_WR
Serial
M₄
Direct
16
DATA
Serial
M₅
Direct
Type
(Note 1)
Input
Input
Input
Input
Input
Input
Input
Input
(Note 1)
(Note 1)
Input
Input
Input
Input
Input
Input
Description
Power supply input. Input may range from 2.85 V to 3.45 V. Bypassing
recommended.
R Counter bit0
R Counter bit1
R Counter bit2
R Counter bit3
Ground
R Counter bit4
R Counter bit5 (MSB)
M Counter bit0
M Counter bit1
Power supply input. Input may range from 2.85 V to 3.45 V. Bypassing
recommended.
Power supply input. Input may range from 2.85 V to 3.45 V. Bypassing
recommended.
M Counter bit2
M Counter bit3
Frequency register load enable input. Buffered data is transferred to the frequency
register on S_WR rising edge.
M Counter bit4
Binary serial data input. Data is entered LSB first, and is clocked serially into the 20
-bit frequency control register (E_WR “low”) or the 8-bit enhancement register
(E_WR “high”) on the rising edge of CLOCK.
M Counter bit5
©2007-2011 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 11
Document No. 70-0236-05 │ UltraCMOS™ RFIC Solutions