PE97632DIE Datasheet, PDF (14/16 Pages) Peregrine Semiconductor – 3.5 GHz Delta-Sigma Modulated Fractional-N Frequency Synthesizer for Low Phase Noise Applications

PE97632 DIE
Product Specification
Table 11. Mechanical Specifications
Parameter
Min
Die size, drawn (x,y)
Die size, singulated (x,y)*
3522 × 3470
3652 × 3470
Wafer thickness
180
Wafer size
Note: * There are two different singulated die sizes per reticle.
Typ
3306 × 3306
3622 × 3570
3752 × 3570
200
150
Max
3722 × 3670
3852 × 3670
220
Figure 7. Pad Numbering^1,2
Unit
Test Condition
μm
As drawn
μm
Including excess sapphire, max. tolerance
= ±100 μm
µm
mm
10 9 8 7 6 5 4 3 2 1 80 79 78 77 76 75 74 73 72 71
V_DD 11
V_DD 12
K_{2 13}
K_{3 14}
K_{4 15}
K_{5 16}
K₆ 17
70 _N/C
69
V_DD
68 GND
67
V_DD
66 _GND
65 _{PD_U}
64 N/C
K_{7 18}
K_{8 19}
63 _{PD_D}
62 GND
K_{9 20}
K_{10 21}
K_{11 22}
K_{12 23}
61
V_DD
60
D_OUT
59 _LD
58
C_EXT
1
Pad 1 indicator
K_{13 24}
57 GND
K_{14 25}
K_{15 26}
56 _GND
55 _GND
K₁₆ 27
K₁₇ 28
V_DD 29
V_DD 30
54
F_IN
53
F_IN
52
V_DD
51 _N/C
Logo
device ID
Notes:
1. All pad locations originate from the die center and refer to the center of the pad.
2. Minimum pad pitch is 150 µm. Pad openings are 90 µm.
©2008-2015 Peregrine Semiconductor Corp. All rights reserved.
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Document No. DOC-01626-3 │ UltraCMOS^® RFIC Solutions