EPR-85 Datasheet, PDF (14/32 Pages) Power Integrations, Inc. – Engineering Prototype Report for EP 85 - 2 W Charger using LinkSwitch-LP

EP-85 6 V, 330 mA Low Cost Charger
04-Oct-2005
7.5 Design Spreadsheet
ACDC_LinkSwitch-
INPUT
LP_091605; Rev.1.0;
Copyright Power
Integrations 2005
ENTER APPLICATION VARIABLES
VACMIN
90
VACMAX
265
fL
50
VO
6.00
INFO
IO
0.33
Constant Voltage / Constant
Current Output
Output Cable Resistance
PO
Feedback Type
YES
0.05
BIAS
Add Bias Winding
YES
Clampless design
n
Z
tC
CIN
Input Rectification Type
YES
0.70
0.50
2.80
10.00
H
OUTP UNIT
UT
ACDC_LinkSwitch-LP_091605_Rev1-0.xls; LinkSwitch-LP
Continuous/Discontinuous Flyback Transformer Design
Spreadsheet
Volts
Volts
Hertz
Volts
Amps
CVCC Volts
EP85 Design
Minimum AC Input Voltage
Maximum AC Input Voltage
AC Mains Frequency
Output Voltage (main) measured at the end of output cable (For
CV/CC designs enter typical CV tolerance limit)
Power Supply Output Current (For CV/CC designs enter typical
CC tolerance limit)
Enter "YES" for CV/CC output. Enter "NO" for CV only output
0.05 Ohms Enter the resistance of the output cable (if used)
1.99 Watts Output Power (VO x IO + dissipation in output cable)
Bias Winding Enter 'BIAS' for Bias winding feedback and 'OPTO' for
Optocoupler feedback
Yes
Enter 'YES' to add a Bias winding. Enter 'NO' to continue
design without a Bias winding. Addition of Bias winding can
lower no load consumption
Clamp
Enter 'YES' for a clampless design. Enter 'NO' if an external
less
clamp circuit is used.
Efficiency Estimate at output terminals. For CV only designs
enter 0.7 if no better data available
0.5
Loss Allocation Factor (Secondary side losses / Total losses)
mSecond Bridge Rectifier Conduction Time Estimate
s
uFarads Input Capacitance
H
Choose H for Half Wave Rectifier and F for Full Wave
Rectification
ENTER LinkSwitch-LP VARIABLES
LinkSwitch-LP
LNK564
Chosen Device
ILIMITMIN
ILIMITMAX
fSmin
I^2fMIN
LNK564
0.124 Amps
0.146 Amps
93000 Hertz
1665 A^2Hz
I^2fTYP
1850 A^2Hz
VOR
VDS
VD
KP
88.00
88 Volts
10 Volts
0.5 Volts
1.54
LinkSwitch-LP device
Minimum Current Limit
Maximum Current Limit
Minimum Device Switching Frequency
I^2f Minimum value (product of current limit squared and
frequency is trimmed for tighter tolerance)
I^2f typical value (product of current limit squared and
frequency is trimmed for tighter tolerance)
Reflected Output Voltage
LinkSwitch-LP on-state Drain to Source Voltage
Output Winding Diode Forward Voltage Drop
Ripple to Peak Current Ratio (0.9<KRP<1.0 : 1.0<KDP<6.0)
ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES
Core Type
EE16
Core
EE16
P/N:
Bobbin
EE16_BOBBIN P/N:
AE
0.192 cm^2
LE
3.5 cm
AL
1140 nH/T^2
BW
8.6 mm
M
0 mm
L
2
NS
8
8
NB
27
VB
21.93 Volts
R1
36.89 k-ohms
Suggested smallest commonly available core
PC40EE16-Z
EE16_BOBBIN
Core Effective Cross Sectional Area
Core Effective Path Length
Ungapped Core Effective Inductance
Bobbin Physical Winding Width
Safety Margin Width (Half the Primary to Secondary Creepage
Distance)
Number of primary layers
Number of Secondary Turns
Number of Bias winding turns
Bias Winding Voltage
Resistor divider component between bias wiinding and FB pin
of LinkSwitch-LP
Power Integrations
Tel: [phone] Fax: [phone]
www.powerint.com
Page 14 of 32