PM3351 Datasheet, PDF (171/268 Pages) PMC-Sierra, Inc – Single-Port 10/100 Mbit/s Ethernet Switch

DATA SHEET
PMC-970113
ISSUE 3
MCONFIG (Memory Configuration register)
Bit
Bits 31 to 16
Bits 15 to 14
Bit 13
Bit 12
Bit 11 to 9
Bit 8 to 6
Bit 5 to 3
Bit 2 to 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
Unused
MXSEL[1:0]
MSLO
MDCAS
MTYPE3[2:0]
MTYPE2[2:0]
MTYPE1[2:0]
MTYPE0[2:0]
PM3351 ELAN 1X100
SINGLE PORT FAST ETHERNET SWITCH
Default
X
MDATA[15:14]1,2
MDATA[13]1,2
MDATA[12]1,2
MDATA[11:9]1
MDATA[8:6]1
MDATA[5:3]1
MDATA[2:0]1
MXSEL[1:0]:
These bits configure the DRAM row/column multiplexing to accommodate
different DRAM organizations:
MXSEL
00
01
10
11
Column Address Bits
8
9
10
11
MSLO:
Determines the expected access time of the local memory: if a logic 1, 80ns
DRAM is expected; otherwise, 60ns DRAM is expected. If EDO DRAM is
used with the PM3351 for non-switching apllications it must be used with
60ns EDO DRAM; hence, MSLO must be a logic 0 for correct operation.
MDCAS:
Used to indicate the organization of DRAM used in the system, if any: if set to
a logic 1, the ELAN 1x100 will generate control signals for 2-CAS DRAMs;
otherwise, the ELAN 1x100 will assume 1-CAS DRAM devices
MTYPE3[2:0]:
Indicates the type of memory device selected with MCS[3]*:
000
Reserved
001
Reserved
010
15ns SRAM
011
Reserved
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 165