PL623-38 Datasheet, PDF (5/6 Pages) PhaseLink Corporation – Low Phase Noise XO (for 3rd O.T.) For 65-130MHz

Preliminary PL623-38
Low Phase Noise XO (for 3^rd O.T.) For 65-130MHz
8. PECL Electrical Characteristics
PARAMETERS
Output High Voltage
Output Low Voltage
SYMBOL
V_OH
V_OL
CONDITIONS
R_L = 50 Ω to (V_DD – 2V)
(see figure)
MIN.
V_DD – 1.025
MAX.
V_DD – 1.620
UNITS
V
V
9. PECL Switching Characteristics
PARAMETERS
Clock Rise Time
Clock Fall Time
SYMBOL
CONDITIONS
tr
@20/80% - PECL
tf
@80/20% - PECL
MIN. TYP. MAX. UNITS
0.2
0.4
ns
0.2
0.4
ns
PECL Levels Test Circuit
OUT
VDD
50Ω
2.0V
PECL Output Skew
OUT
50%
50Ω
OUT
OUT
80%
50%
20%
OUT
t_R
OUT
t_SKEW
PECL Transistion Time Waveform
DUTY CYCLE
45 - 55%
55 - 45%
t_F
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