PL623-38 Datasheet, PDF (2/6 Pages) PhaseLink Corporation – Low Phase Noise XO (for 3rd O.T.) For 65-130MHz

Preliminary PL623-38
Low Phase Noise XO (for 3^rd O.T.) For 65-130MHz
DIE PAD ASSIGNMENT
Pad #
1
2
3
4
5
6
7
8
9
10
11
12
Name
GNDOSC
GNDOSC
GNDANA
GNDSHIELD
GNDSHIELD
GNDBUF
GNDBUF
Q
QBAR
VDDBUF
VDDBUF
OESEL
13
VDDBUF
14
VDDANA
15
VDDOSC
16
SEL1
17
SEL0
18
GNDOSC
19
OECTRL
20
XIN
21
XOUT
22
OECTRL
X (µm)
329.6
498.3
696.2
825.0
973.6
1150.0
1183.6
1183.6
1183.6
1182.4
1252.4
1252.4
1058.5
864.5
624.0
467.1
271.1
109.4
108.9
109.0
108.6
108.6
Y (µm)
110.1
110.0
110.0
110.0
110.0
109.1
302.2
452.3
613.5
745.9
903.6
1081.3
1221.6
1221.6
1222.7
1222.6
1222.6
1222.9
1062.1
865.8
358.4
146.5
Pad Description
GND connection for oscillator circuitry.
GND connection for oscillator circuitry.
GND connection for analog circuitry.
GND shielding connection.
GND shielding connection.
GND connection for output buffer circuitry.
GND connection for output buffer circuitry.
PECL output.
Complementary PECL output.
VDD connection for output buffer circuitry. VDDBUF should be
separately decoupled from other VDDs whenever possible.
VDD connection for output buffer circuitry. VDDBUF should be
separately decoupled from other VDDs whenever possible.
This is the selector input to choose the OE control logic to be
applied, as presented on the OE SELECTION TABLE on page ‘1’.
VDD connection for output buffer circuitry.
VDDBUF should be separately decoupled from other VDDs
whenever possible.
VDD connection for analog circuitry. VDDANA should be
separately decoupled from other VDDs whenever possible.
VDD connection for oscillator circuitry. VDDOSC should be
separately decoupled from other VDDs whenever possible.
Output Divider Selector pin as presented on the DIVIDER
SELECTOR TABLE on page ‘1’.
Output Divider Selector pin as presented on the DIVIDER
SELECTOR TABLE on page ‘1’.
GND connection for oscillator circuitry.
Output Enable input pad. See OE SELECTION TABLE on page 1.
Crystal connector pad. This pad is the input of the crystal
oscillator circuitry. The crystal should be mounted as close to the
IC as possible, with minimum parasitic capacitance.
Crystal connector pad. This pad is the input of the crystal
oscillator circuitry. The crystal should be mounted as close to the
IC as possible, with minimum parasitic capacitance.
Output Enable input pad. See OE SELECTION TABLE on page 1.
47745 Fremont Blvd., Fremont, California 94538 TEL [phone] FAX [phone] www.phaselink.com Rev 05/03/05 Page 2