English
Language : 

NPIC6C596A_15 Datasheet, PDF (9/21 Pages) NXP Semiconductors – Power logic 8-bit shift register open-drain outputs
NXP Semiconductors
NPIC6C596A
Power logic 8-bit shift register; open-drain outputs
10. Dynamic characteristics
Table 6. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); For test circuit, see Figure 14.
Symbol Parameter
Conditions
tPLH
LOW to HIGH
propagation delay
OE to Qn; ID = 75 mA; see Figure 10 and
Figure 19
tPHL
HIGH to LOW
propagation delay
OE to Qn; ID = 75 mA; see Figure 10 and
Figure 19
tr
rise time
OE to Qn; ID = 75 mA; see Figure 10 and
Figure 19
tf
fall time
OE to Qn; ID = 75 mA; see Figure 10 and
Figure 19
tpd
propagation delay
SHCP to Q7S; ID = 75 mA; see Figure 11 [2]
fmax
maximum frequency SHCP; ID = 75 mA; see Figure 11
[3]
trr
reverse recovery time IF = 100 mA; dI/dt = 10 A/s;
[4][5]
see Figure 13
ta
reverse recovery
IF = 100 mA; dI/dt = 10 A/s;
[4][5]
current rise time
see Figure 13
tsu
set-up time
th
hold time
tW
pulse width
DS to SHCP; see Figure 12
DS to SHCP; see Figure 12
Tamb = 25 C
Min
Typ[1]
Max
-
97
-
-
9
-
-
60
-
-
18
-
-
5
-
-
-
10
-
120
-
-
100
-
15
-
-
15
-
-
40
-
-
Unit
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
[1] Typical values are measured at Tamb = 25 C and VCC = 5.0 V.
[2] tpd is the same as tPLH and tPHL.
[3] This is the maximum serial clock frequency assuming cascaded operation where serial data is passed from one stage to a second
stage. The clock period allows for SHCP → Q7S propagation delay and setup time plus some timing margin.
[4] Technique should limit Tj  Tamb to 10 C maximum.
[5] These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
10.1 Test circuits and waveforms
OE input
VI
GND
Qn output
LOW-to-OFF
OFF-to-LOW
24 V
VOL
VM
tPLH
VY
VX
tr
tPHL
VY
VX
tf
aaa-002557
Measurement points are given in Table 7.
VOL is the typical output voltage drop that occurs with the output load.
Fig 10. The output enable (OE) input to data output (Qn) propagation delays and (Qn) output rise and fall times
NPIC6C596A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 23 October 2013
© NXP B.V. 2013. All rights reserved.
9 of 21