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| NPIC6C596A_15 Datasheet, PDF (11/21 Pages) NXP Semiconductors – Power logic 8-bit shift register open-drain outputs | |||
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NXP Semiconductors
NPIC6C596A
Power logic 8-bit shift register; open-drain outputs
Qn
DUT
IF
t2
t1
t3
K(1)
0.85 mH
2500 μF
250 V
A(1)
0.1 A
15 V
IF
0
di/dt = 10 A/μs
25 % of lRM
RG
VI(2) G
driver
50 Ω
IRM
ta
trr
aaa-002560
(1) The open-drain Qn terminal under test is connected to testpoint K. All other terminals are connected together and connected to
testpoint A.
(2) The VI amplitude and RG are adjusted for dI/dt = 10 A/ïs. A VI double-pulse train is used to set IF = 0.1 A, where t1 = 10 ïs, t2 =
7 ïs and t3 = 3 ïs.
Fig 13. Test circuit and waveform for measuring reverse recovery current
NPIC6C596A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 â 23 October 2013
© NXP B.V. 2013. All rights reserved.
11 of 21
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