74ABTL3205 Datasheet, PDF (9/14 Pages) NXP Semiconductors – 10-bit BTL transceiver with registers

Philips Semiconductors
10-bit BTL transceiver with registers
Product specification
74ABTL3205
AC ELECTRICAL CHARACTERISTICS
B PORT LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
T_amb = +25°C
V_CC = 5V
C_D = 30pF, R_U = 18.5Ω
MIN
TYP MAX
T_amb = –40°C to +85°C
V_CC = 5V ± 10%
C_L = 30pF, R_U = 18.5Ω
MIN
MAX
UNIT
t_PLH
Propagation delay
t_PHL
An to Bn
t_PLH
Propagation delay,
t_PHL
ACLKin to Bn
t_PLH
Propagation delay
t_PHL
ACLKin to BCLK2
t_PLH
Propagation delay
t_PHL
ACLK1 to BCLK1
t_PLH
Propagation delay
t_PHL
ACLK2 to BCLK2
t_PLH
Enable/disable time
t_PHL
OEB to Bn or BCLK2
t_TLH
Transition time, Bn Port
t_THL
(1.3V to 1.8V)
Waveform 2
1.0
3.3
4.7
1.0
1.0
2.7
4.5
1.0
Waveform 1, 2
2.0
4.6
5.9
2.0
2.0
4.5
5.9
2.0
Waveform 1, 2
2.0
4.6
7.3
2.0
2.0
4.5
7.3
2.0
Waveform 2
1.0
3.2
4.7
1.0
1.0
2.9
4.5
1.0
Waveform 2
1.0
3.1
5.7
1.0
1.0
3.1
5.5
1.0
Waveform 1, 2
1.0
3.8
6.8
1.0
1.0
3.4
6.4
1.0
Test Circuit and
1.0
Waveforms
0.6
2.5
1.0
2.0
0.6
5.7
ns
6.3
ns
6.3
7.6
ns
7.6
5.1
ns
4.7
6.0
ns
5.6
7.6
ns
6.9
3.0
ns
2.5
t_SK(p)
Pulse skew2
|t_PHL – t_PLH| _MAX
Waveform 3
2.0
ns
NOTES:
1. | t_PN actual – t_PM actual | for any data input to output path compared to any other data input to output path where N and M are either LH or
HL. Skew times are valid only under same test conditions (temperature, V_CC, loading, etc.).
2. t_SK(p) is used to quantify duty cycle characteristics. In essence it compares the input signal duty cycle to the corresponding output signal
duty cycle. (50MHz input frequency and 50% duty cycle, tested on data paths only).
AC SETUP REQUIREMENTS
SYMBOL
PARAMETER
t_s(H)
t_s(L)
t_h(H)
t_h(L)
Setup time
An to ACLKin
Hold time
An to ACLKin
TEST
CONDITION
Waveform 6
Waveform 6
LIMITS
T_amb = +25°C
V_CC = 5V
T_amb = –40°C to +85°C
V_CC = 5V ± 10%
C_L = 50pF (A side) / C_D = 30pF (B side)
R_L = 500Ω (A side) / R_U = 18.5Ω (B side)
MIN
TYP
MIN
MAX
1.9
2.0
1.3
1.5
1.8
2.3
2.0
2.0
UNIT
ns
ns
1995 Jun 16
9