TDA8769 Datasheet, PDF (8/28 Pages) NXP Semiconductors – 12-bit, 60/80/105 Msps Analog-to-Digital Converter (ADC) Nyquist/high IF sampling

Philips Semiconductors
12-bit, 60/80/105 Msps Analog-to-Digital Converter
(ADC) Nyquist/high IF sampling
Objective specification
TDA8769
SYMBOL PARAMETER
CONDITIONS
TIMING
f_clk(min)
f_clk(max)
t_CLKH
t_CLKL
minimum clock V_TH = V_CCD
frequency
maximum clock
frequency
TDA8769HW/6
maximum clock
frequency
TDA8769HW/8
maximum clock
frequency
TDA8769HW/10
clock HIGH
pulse width
f_i = 21.4 MHz
clock LOW pulse f_i = 21.4 MHz
width
Analog inputs: pins IN and INN
I_IL
LOW-level input V_VREF = V_CCA3 − 1.75 V;
current
V_TH = HIGH
I_IH
HIGH-level input V_VREF = V_CCA3 − 1.75 V;
current
V_TH = HIGH
R_i
input resistance
C_i
input
capacitance
V_i(CM)
common mode V_IN = V_INN;
input voltage
output code = 2047
Digital inputs: pins OTC, SH, DEL1, DEL0 and CEN
V_IL
LOW-level input
voltage
V_IH
HIGH-level input
voltage
I_IL
LOW-level input V_IL = 0.3V_CCD
current
I_IH
HIGH-level input V_IH = 0.7V_CCD
current
Voltage controlled regulator output: pin CMADC
V_o(CM)
common mode
output voltage
I_L(CM)
load current
TEST⁽¹⁾
MIN.
TYP.
−
−
60
−
80
−
105
−
(tbf)
−
(tbf)
−
−
10
−
10
D
−
8.4
D
−
250
D
V_CCA3 − 1.2 V_CCA3 − 1.6
DGND
−
0.7V_CCD
−
(tbf)
−
−
−
−
V_CCA3 − 1.6
−
1
MAX. UNIT
9
Msps
−
MHz/
Msps
−
MHz/
Msps
−
MHz/
Msps
−
ns
−
ns
−
µA
−
µA
−
MΩ
500
fF
V_CCA3 − 1.7 V
0.3V_CCD
V
V_CCD
V
µA
(tbf)
µA
−
V
2
mA
2003 Dec 09
8