TDA8769 Datasheet, PDF (7/28 Pages) NXP Semiconductors – 12-bit, 60/80/105 Msps Analog-to-Digital Converter (ADC) Nyquist/high IF sampling

Philips Semiconductors
12-bit, 60/80/105 Msps Analog-to-Digital Converter
(ADC) Nyquist/high IF sampling
Objective specification
TDA8769
10 CHARACTERISTICS
V_CCA = 4.75 to 5.25 V; V_CCD = 4.75 to 5.25 V; V_CCO = 2.7 to 3.6 V; AGND connected to DGND; T_amb = −40 to +85 °C;
V_IN(p−p) − V_{INN(p−p)} = 1.9 V − 0.5 dBFS; V_VREF = V_CCA3 − 1.75 V; V_{i(CM )} = V_CCA3 − 1.6 V; typical values measured at
V_CCA = V_CCD = 5 V, V_CCO = 3.0 V, T_amb = 25 °C and C_L = 10 pF; unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
TEST⁽¹⁾
MIN.
TYP.
MAX. UNIT
Supplies
V_CCA
analog supply
voltage
V_CCD
digital supply
voltage
V_CCO
output supply
voltage
I_CCA
analog supply
current
I_CCD
digital supply
current
I_CCO
P_tot
output supply
current
total power
dissipation
f_CLK = 80 Msps;
f_i = 21.4 MHz
f_CLK = 60 Msps;
f_i = 21.4 MHz
f_CLK = 80 Msps;
f_i = 21.4 MHz
f_CLK = 105 Msps;
f_i = 21.4 MHz
Clock inputs: pins CLK and CLKN; note 2
4.75
5.0
4.75
5.0
2.7
3.0
−
109
−
48
−
17.5
−
825
−
840
−
855
5.25
V
5.25
V
3.6
V
(tbf)
mA
(tbf)
mA
(tbf)
mA
(tbf)
mW
(tbf)
mW
(tbf)
mW
INPUTS
V_IL
V_IH
I_IL
I_IH
∆V_CLK
R_i
C_i
LOW-level input
voltage
referenced to DGND;
V_CCD = 5 V
PECL mode
TTL mode
HIGH-level input referenced to DGND;
voltage
V_CCD = 5 V
PECL mode
TTL mode
LOW-level input
current
HIGH-level input
current
differential AC
input voltage for
switching
V_CLK or V_CLKN = 3.52 V
V_CLK or V_CLKN = 0.80 V
V_CLK or V_CLKN = 3.83 V
V_CLK or V_CLKN = 2.00 V
∆V_CLK = V_CLK − V_CLKN;
AC mode; DC voltage
level = 2.5 V
input resistance
input
capacitance
f_CLK = 105 Msps
f_CLK = 105 Msps
3.19
−
DGND
−
3.83
−
2.0
−
(tbf)
−
(tbf)
−
−
−
−
−
(tbf)
1.5
−
(tbf)
−
(tbf)
3.52
V
0.8
V
4.12
V
V_CCD
V
−
µA
−
mA
(tbf)
µA
(tbf)
mA
(tbf)
V
−
MΩ
−
pF
2003 Dec 09
7