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TDA6402 Datasheet, PDF (8/40 Pages) NXP Semiconductors – 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners
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Philips Semiconductors
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
Product specification
TDA6402; TDA6402A;
TDA6403; TDA6403A
I2C-bus mode (SW = GND)
WRITE MODE; R/W = 0 (see Tables 3 and 4)
Data bytes can be sent to the device after the address
transmission (first byte). Four data bytes are needed to
fully program the device. The bus transceiver has an
auto-increment facility which permits the programming of
the device within one single transmission
(address + 4 data bytes).
The device can also be partially programmed providing
that the first data byte following the address is divider
byte 1 (DB1) or control byte (CB). The bits in the data
bytes are defined in Tables 3 and 4. The first bit of the first
data byte transmitted indicates whether frequency data
(first bit = 0) or control and band-switch data (first bit = 1)
will follow. Until an I2C-bus STOP command is sent by the
controller, additional data bytes can be entered without the
need to re-address the device. The frequency register is
loaded after the 8th clock pulse of the second divider byte
(DB2), the control register is loaded after the 8th clock
pulse of the control byte (CB) and the band-switch register
is loaded after the 8th clock pulse of the band switch byte
(BB).
I2C-BUS ADDRESS SELECTION
The module address contains programmable address bits
(MA1 and MA0) which offer the possibility of having
several synthesizers (up to 4) in one system by applying a
specific voltage on the CE input. The relationship between
MA1 and MA0 and the input voltage applied to the CE
input is given in Table 6.
Table 3 I2C-bus data format, ‘write’ mode for the TDA6402 and TDA6403
NAME
BYTE
MSB
BITS
Address byte
ADB
1
1
0
0
0
Divider byte 1
DB1
0
N14
N13
N12
N11
Divider byte 2
DB2
N7
N6
N5
N4
N3
Control byte
CB
1
CP
T2
T1
T0
Band-switch byte BB
X
X
X
X
FMST
MA1
N10
N2
RSA
PUHF
LSB
MA0 R/W = 0
N9
N8
N1
N0
RSB
OS
PVHFH PVHFL
ACK
A
A
A
A
A
Table 4 I2C-bus data format, ‘write’ mode for the TDA6402A and TDA6403A
NAME
BYTE
MSB
BITS
Address byte
ADB
1
1
0
0
0
Divider byte 1
DB1
0
N14
N13
N12
N11
Divider byte 2
DB2
N7
N6
N5
N4
N3
Control byte
CB
1
CP
T2
T1
T0
Band-switch byte BB
X
X
X
X
PUHF
MA1
N10
N2
RSA
FMST
LSB
MA0 R/W = 0
N9
N8
N1
N0
RSB
OS
PVHFH PVHFL
ACK
A
A
A
A
A
2000 Jan 24
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