TDA6402 Datasheet, PDF (7/40 Pages) NXP Semiconductors – 5 V mixers/oscillators and synthesizers for cable TV and VCR 2-band tuners

Philips Semiconductors
5 V mixers/oscillators and synthesizers for
cable TV and VCR 2-band tuners
Product specification
TDA6402; TDA6402A;
TDA6403; TDA6403A
handbook, halfpage
UHFIN1 1
28 UHFOSCIB2
UHFIN2 2
27 UHFOSCOC2
VHFIN 3
26 UHFOSCOC1
RFGND 4
25 UHFOSCIB1
IFFIL1 5
24 VHFOSCOC
IFFIL2 6
23 OSCGND
PVHFL 7 _TDA6402 22 VHFOSCIB
PVHFH 8 ^TDA6402A 21 GND
PUHF 9
20 IFOUT
FMST 10
SW 11
19 ^VCC
18 XTAL
CE/AS 12
17 VT
DA 13
16 CP
CL 14
15 LOCK/ADC
MGE690
Fig.2 Pin configuration for TDA6402 and
TDA6402A.
handbook, halfpage
UHFOSCIB2 1
28 UHFIN1
UHFOSCOC2 2
27 UHFIN2
UHFOSCOC1 3
26 VHFIN
UHFOSCIB1 4
25 RFGND
VHFOSCOC 5
24 IFFIL1
OSCGND 6
23 IFFIL2
VHFOSCIB 7 _TDA6403 22 PVHFL
GND 8 ^TDA6403A 21 PVHFH
IFOUT 9
VCC ₁₀
XTAL 11
20 PUHF
19 FMST
18 SW
VT 12
17 CE/AS
CP 13
16 DA
LOCK/ADC 14
15 CL
MGE691
Fig.3 Pin configuration for TDA6403 and
TDA6403A.
PLL FUNCTIONAL DESCRIPTION
The device is controlled via the I²C-bus or the 3-wire bus,
depending on the voltage applied on the SW input.
A HIGH-level on the SW input enables the 3-wire bus;
CE/AS, DA and CL inputs are used as enable (CE), data
and clock inputs respectively. A LOW-level on SW input
enables the I²C-bus; the CE/AS, DA and CL inputs are
used as address selection (AS), SDA and SCL input
respectively (see Table 2).
Table 2 Bus mode selection
SYMBOL
SW
CE/AS
DA
CL
LOCK/ADC
PIN
TDA6402;
TDA6402A
11
12
13
14
15
TDA6403;
TDA6403A
18
17
16
15
14
3-WIRE BUS MODE
HIGH-level or OPEN
enable input
data input
clock input
LOCK/TEST output
I²C-BUS MODE
LOW-level or GND
address selection input
serial data input
serial clock input
ADC input/TEST output
2000 Jan 24
7