NPIC6C595_15 Datasheet, PDF (8/20 Pages) NXP Semiconductors – Power logic 8-bit shift register; open-drain outputs

NXP Semiconductors
NPIC6C595
Power logic 8-bit shift register; open-drain outputs
10. Dynamic characteristics
Table 6. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 14.
Symbol Parameter
Conditions
t_PLH
LOW to HIGH
propagation delay
OE to Qn; I_D = 75 mA; see Figure 10 and
Figure 19
t_PHL
HIGH to LOW
propagation delay
OE to Qn; I_D = 75 mA; see Figure 10 and
Figure 19
t_r
rise time
OE to Qn; I_D = 75 mA; see Figure 10 and
Figure 19
t_f
fall time
OE to Qn; I_D = 75 mA; see Figure 10 and
Figure 19
t_pd
propagation delay
SHCP to Q7S; I_D = 75 mA; see Figure 11 ^[1]
f_max
maximum frequency SHCP; I_D = 75 mA; see Figure 11
[2]
t_rr
reverse recovery time I_F = 100 mA; dI/dt = 10 A/s;
[3][4]
see Figure 13
t_a
reverse recovery
I_F = 100 mA; dI/dt = 10 A/s;
[3][4]
current rise time
see Figure 13
t_su
set-up time
t_h
hold time
t_W
pulse width
DS to SHCP; see Figure 12
DS to SHCP; see Figure 12
V_CC = 5.0 V; T_amb = 25 C
Min
Typ
Max
-
97
-
-
9
-
-
60
-
-
18
-
-
5
-
-
-
10
-
120
-
-
100
-
20
-
-
20
-
-
40
-
-
Unit
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
[1] t_pd is the same as t_PLH and t_PHL.
[2] This is the maximum serial clock frequency assuming cascaded operation where serial data is passed from one stage to a second
stage. The clock period allows for SHCP → Q7S propagation delay and setup time plus some timing margin.
[3] This technique should limit T_j  T_amb to 10 C maximum.
[4] These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
10.1 Test circuits and waveforms
OE input
V_I
GND
Qn output
LOW-to-OFF
OFF-to-LOW
24 V
V_OL
V_M
t_PLH
V_Y
V_X
t_r
t_PHL
V_Y
V_X
t_f
aaa-002557
Measurement points are given in Table 7.
V_OL is the typical output voltage level that occurs with the output load.
Fig 10. The output enable (OE) input to data output (Qn) propagation delays and (Qn) output rise and fall times
NPIC6C595
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 20 August 2012
© NXP B.V. 2012. All rights reserved.
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