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| 80C550 Datasheet, PDF (7/28 Pages) NXP Semiconductors – 80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless, 8 channel 8 bit A/D, watchdog timer | |||
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Philips Semiconductors
80C51 8-bit microcontroller family
4K/128 OTP/ROM/ROMless, 8 channel 8 bit A/D, watchdog timer
Product specification
80C550/83C550/87C550
MSB
SMOD SIDL X
LSB
X
GF1 GF0 PD
IDL
BIT
PCON.7
PCON.6
PCON.5
PCON.4
PCON.3
PCON.2
PCON.1
PCON.0
SYMBOL
SMOD
SIDL
X
X
GF1
GF0
PD
IDL
FUNCTION
Double baud rate
Serial port idle
Reserved for future use
Reserved for future use
General purpose flag bit
General purpose flag bit
Power down bit
Idle mode bit
NOTE:
The PCON register is at SFR byte address 87H. Its contents following a reset are 00XX0000.
SU00197
Figure 1. Power Control Register (PCON)
MSB
LSB
X
X
X ADCI ADCS AADR2 AADR1 AADR0
INPUT CHANNEL SELECTION
ADDR2
0
0
0
0
1
1
1
1
ADDR1
0
0
1
1
0
0
1
1
ADDR0
0
1
0
1
0
1
0
1
INPUT PIN
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
ADC6
ADC7
BIT
SYMBOL
ADCON.7 â
ADCON.6 â
ADCON.5 â
ADCON.4 ADCI
ADCON.3 ADCS
ADCON.2 ADDR2
ADCON.1 ADDR1
ADCON.0 ADDR0
FUNCTION
Not used
Not used
Not used
ADC Interrupt flag.
This flag is set when an ADC conversion result is ready to be read. An interrupt is invoked if the
A/D interrupt is enabled. The flag must be cleared by software. It cannot be set by software.
ADC Start and Status.
Setting this flag starts an A/D conversion. The ADC logic insures that this signal is high while the
ADC is busy. On completion of the conversion, ADCS is reset at the same time the interrupt flag
ADCI is set. ADCS cannot be reset by software.
Analog Input Select 2
Analog Input Select 1
Analog Input Select 0
SU00198
Figure 2. A/D Control Register (ADCON)
1998 May 01
7
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