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74HC2GU04_15 Datasheet, PDF (7/16 Pages) NXP Semiconductors – Dual unbuffered inverter | |||
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NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
Table 9.
Input
VM
0.5VCC
Measurement points
VI
GND to VCC
tr = tf
6.0 ns
Output
VM
0.5VCC
38/6(
9,
*(1(5$725
9&&
'87
57
9&&
92
5/ NÈ
&/ S)
RSHQ
PJN
Fig 6.
Test data is given in Table 10.
Definitions test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Test circuit for measuring switching times
Table 10. Test data
Input
VI
GND to VCC
tr, tf
6 ns
13. Additional characteristics
Test
tPHL, tPLH
open
5ELDV NÈ
9&&
Â) LQSXW
9,
I N+]
RXWSXW Â)
$ ,2
*1'
PQD
gfs
=
-ï---I---o-
ïVi
VO is constant.
Fig 7. Test setup for measuring forward transconductance
74HC2GU04
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 â 20 August 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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