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| 74HC2GU04_15 Datasheet, PDF (6/16 Pages) NXP Semiconductors – Dual unbuffered inverter | |||
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NXP Semiconductors
74HC2GU04
Dual unbuffered inverter
11. Dynamic characteristics
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit, see Figure 6.
Symbol Parameter
Conditions
25 ï°C
ï40 ï°C to +125 ï°C Unit
Min Typ Max Min Max Max
(85 ï°C) (125 ï°C)
tpd
propagation delay
nA to nY; see Figure 5
[1]
VCC = 2.0 V; CL = 50 pF
- 13 60 -
75
90 ns
VCC = 4.5 V; CL = 50 pF
- 6 12 -
15
18 ns
VCC = 6.0 V; CL = 50 pF
- 5 10 -
13
15 ns
tt
transition time
nY; see Figure 5
[2]
VCC = 2.0 V; CL = 50 pF
- 18 75 -
95
125 ns
VCC = 4.5 V; CL = 50 pF
- 6 15 -
19
25 ns
VCC = 6.0 V; CL = 50 pF
- 5 13 -
16
20 ns
CPD
power dissipation capacitance VI = GND to VCC
[3] -
5
-
-
-
- pF
[1] tpd is the same as tPLH and tPHL.
[2] tt is the same as tTLH and tTHL.
[3] CPD is used to determine the dynamic power dissipation (PD in ïW).
PD = CPD ï´ VCC2 ï´ fi ï´ N + ï(CL ï´ VCC2 ï´ fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
ï(CL ï´ VCC2 ï´ fo) = sum of the outputs.
12. Waveforms
9,
Q$LQSXW
*1'
92+
Q<RXWSXW
92/
90
W 3+/
90
W 7+/
90
90
W 3/+
W 7/+
PQD
Fig 5.
Measurement points are given in Table 9.
VOL and VOH are typical output voltage levels that occur with the output load.
The data input (nA) to output (nY) propagation delays and output transition times
74HC2GU04
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 â 20 August 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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