74HC2GU04_15 Datasheet, PDF(2/16 Page) NXP Semiconductors – Dual unbuffered inverter

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74HC2GU04_15 Datasheet, PDF (2/16 Pages) NXP Semiconductors – Dual unbuffered inverter

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NXP Semiconductors

5. Functional diagram

74HC2GU04

Dual unbuffered inverter

1 1A

1Y 6

1

1

6

3 2A

2Y 4

mnb079

Fig 1. Logic symbol

1

3

4

mnb080

Fig 2. IEC logic symbol

6. Pinning information

6.1 Pinning

$

<

PQD

Fig 3. Logic diagram (one gate)

74HC2GU04

Fig 4. Pin configuration

1A 1

GND 2

2A 3

6 1Y

5 VCC

4 2Y

001aaf305

6.2 Pin description

Table 3.

Symbol

1A

GND

2A

2Y

VCC

1Y

Pin description

Pin

1

2

3

4

5

6

Description

data input

ground (0 V)

data input

data output

supply voltage

data output

7. Functional description

Table 4.

Input

nA

L

H

Function table[1]

[1] H = HIGH voltage level; L = LOW voltage level.

Output

nY

H

L

74HC2GU04

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 â 20 August 2014

Â© NXP Semiconductors N.V. 2014. All rights reserved.

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