74HC193 Datasheet, PDF (7/13 Pages) NXP Semiconductors – Presettable synchronous 4-bit binary up/down counter

Philips Semiconductors
Presettable synchronous 4-bit binary
up/down counter
Product specification
74HC/HCT193
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
I_CC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; t_r = t_f = 6 ns; C_L = 50 pF
T_amb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
74HC
+25
−40 to +85
−40 to +125
UNIT
V_CC
(V)
WAVEFORMS
min. typ. max. min. max. min. max.
t_PHL/ t_PLH propagation delay
CP_U, CP_D to Q_n
t_PHL/ t_PLH propagation delay
CP_U to TC_U
63 215
270
23 43
54
18 37
46
39 125
155
14 25
31
11 21
26
325 ns
65
55
190 ns
38
32
2.0 Fig.7
4.5
6.0
2.0 Fig.8
4.5
6.0
t_PHL/ t_PLH propagation delay
CP_D to TC_D
39 125
155
14 25
31
11 21
26
190 ns
38
32
2.0 Fig.8
4.5
6.0
t_PHL/ t_PLH propagation delay
PL to Q_n
t_PHL
propagation delay
MR to Q_n
69 220
275
25 44
55
20 37
47
58 200
250
21 40
50
17 34
43
330 ns
66
56
300 ns
60
51
2.0 Fig.9
4.5
6.0
2.0 Fig.10
4.5
6.0
t_PHL/ t_PLH propagation delay
D_n to Q_n
69 210
265
25 42
53
20 36
45
315 ns
63
54
2.0 Fig.9
4.5
6.0
t_PHL/ t_PLH propagation delay
PL to TC_U, PL to TC_D
80 290
365
29 58
73
23 49
62
t_PHL/ t_PLH propagation delay
74 285
355
MR to TC_U, MR to TC_D
27 57
71
22 48
60
435 ns
87
74
430 ns
86
73
2.0 Fig.12
4.5
6.0
2.0 Fig.12
4.5
6.0
t_PHL/ t_PLH propagation delay
D_n to TC_U, D_n to TC_D
80 290
365
29 58
73
23 49
62
435 ns
87
74
2.0 Fig.12
4.5
6.0
t_THL/ t_TLH output transition time
t_W
up, down clock pulse
width HIGH or LOW
19 75
7 15
6 13
100 22
20 8
17 6
95
19
16
125
25
21
110 ns
22
19
150
ns
30
26
2.0 Fig.10
4.5
6.0
2.0 Fig.7
4.5
6.0
December 1990
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