74HC160 Datasheet, PDF (7/9 Pages) NXP Semiconductors – Presettable synchronous BCD decade counter; asynchronous reset

Philips Semiconductors
Presettable synchronous BCD decade
counter; asynchronous reset
Product specification
74HC/HCT160
SYMBOL PARAMETER
t_su
set-up time
CEP, CET to CP
t_h
hold time
D_n to CP
t_h
hold time
PE to CP
t_h
hold time
CEP, CET to CP
f_max
maximum clock pulse
frequency
T_amb (°C)
TEST CONDITIONS
min.
+25
typ.
max.
74HC
−40 to +85
min. max.
−40 to +125
min. max.
UNIT
V_CC ^WAVEFORMS
(V)
200 63
40 23
34 18
250
300
50
60
43
51
ns 2.0 Fig. 12
4.5
6.0
0 −17
0
0
0 −6
0
0
0 −5
0
0
0 −41
0
0
0 −15
0
0
0 −12
0
0
0 −58
0
0
0 −21
0
0
0 −17
0
0
6.0 18
30 55
35 66
4.8
4.0
24
20
28
24
ns 2.0 Figs 11 and 12
4.5
6.0
ns 2.0 Figs 11 and 12
4.5
6.0
ns 2.0 Figs 11 and 12
4.5
6.0
MHz 2.0 Fig. 8
4.5
6.0
December 1990
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