UMA1022M Datasheet, PDF (6/20 Pages) NXP Semiconductors – Low cost dual frequency synthesizer for radio telephones

Philips Semiconductors
Low cost dual frequency synthesizer for
radio telephones
Product specification
UMA1022M
Data format
The leading bits (dt15 to dt0) make up the data field, while
the trailing three bits (ad2 to ad0) comprise an address
field. The UMA1022M uses 4 of the 8 available addresses.
The data format is shown in Table 1. The first bit entered
is dt15, the last bit is ad0. For the divider ratios, the first
bits entered (P0 and R0) are the Least Significant Bits
(LSB). This is different from previous Philips
synthesizers.
The trailing address bits are decoded on the rising edge of
E. This produces an internal load pulse to store the data in
the addressed latch. To avoid erroneous divider ratios, the
load pulse is not allowed during data reads by the
frequency dividers. This condition is guaranteed by
respecting a minimum E pulse width after data
transfer.The test register bits should not normally be
programmed active (HIGH); normal operation requires
them set LOW. When the supply voltage is established an
internal power-up initialization pulse is generated to
preconfigure the circuit state. Production testing does not
verify that all bits are preconfigured correctly.
Power-down mode
The RF and IF synthesizers are on when respectively the
input signal ON_A and ON_B are HIGH. When turned on, the
dividers and phase detector are synchronized to avoid
random phase errors. When turned off, the phase detector
is synchronized to avoid interrupting charge pump pulses.
The UMA1022M has a very low current consumption in the
power-down mode.
Table 1 Bit allocation; note 1
FIRST IN
REGISTER BIT ALLOCATION
DATA FIELD
LAST IN
ADDRESS
dt15 dt14 dt13 dt12 dt11 dt10 dt9 dt8 dt7 dt6 dt5 dt4 dt3 dt2 dt1 dt0 ad2 ad1 ad0
Test bits⁽²⁾
CPI S/D XON⁽³⁾ X X X X P/A⁽⁴⁾
REFDIV2⁽⁵⁾
011
P0⁽⁶⁾
RF synthesizer main divider coefficient
P15 0 0 0
X
X
X
X
X
X R0⁽⁶⁾
reference divider coefficient
R9 0 0 1
X
X A0⁽⁶⁾
IF synthesizer main divider coefficient
A13 0 1 0
Notes
1. X = don’t care.
2. The test bits (at address 011) should not be programmed with any other value except all zeros for normal operation.
3. Bit XON = power-on of crystal oscillator low-noise amplifier; logic 1 turns on circuit block.
4. Bit P/A = 1 selects the output of the reference subdivider to the RF synthesizer and the output of the common
reference divider to the IF synthesizer.
5. The coefficient REFDIV2 (4 bits) selects the phase comparison ratio (1 to 16) between IF and RF synthesizers
(see Table 2).
6. P0 is the LSB of the RF main divider coefficient; R0 is the LSB of the reference divider coefficient; A0 is the LSB of
the IF main divider.
1998 Dec 09
6