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UMA1022M Datasheet, PDF (12/20 Pages) NXP Semiconductors – Low cost dual frequency synthesizer for radio telephones
Philips Semiconductors
Low cost dual frequency synthesizer for
radio telephones
Product specification
UMA1022M
SERIAL BUS TIMING CHARACTERISTICS
VDD = VDDX = VCCA = VCCB = 3 V; Tamb = 25 °C; unless otherwise specified.
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Serial programming clock; CLK
tr
input rise time
tf
input fall time
Tcy
clock period
Enable programming; E
tSTART
tEND
tW(min)
tSU;E
delay to rising clock edge
delay from last falling clock edge
minimum inactive pulse width
enable set-up time to next clock edge
Register serial input data; DATA
tSU;DAT
tHD;DAT
input data to clock set-up time
input data to clock hold time
−
10
40
ns
−
10
40
ns
100
−
−
ns
100
−
−
ns
20
−
−
ns
1500(1) −
−
ns
20
−
−
ns
20
−
−
ns
20
−
−
ns
Note
1. The minimum pulse width (tW(min)) can be smaller than 1.5 µs when the following conditions are fulfilled:
a) Main divider input frequency fRF > -t-W--3---(8-m--3--i-n--)
b) Reference divider input frequency fxtal > -t-W-----(3-m----i-n--)
handbook, full pagewtSidUth;DAT
CLK
DATA
LSB
E
tSTART
1998 Dec 09
tHD;DAT
Tcy
tf
tr
tEND tSU;E
MSB
ADDRESS
Fig.3 Serial bus timing diagram.
12
tW(min)
MGE628