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TDA8776 Datasheet, PDF (6/20 Pages) NXP Semiconductors – 10-bit, 500 Msps Digital-to-Analog Converter DAC
Philips Semiconductors
10-bit, 500 Msps Digital-to-Analog
Converter (DAC)
Product specification
TDA8776
CHARACTERISTICS
VEEA = V24 to V5 and V10 = −5.46 to −4.94 V; VEED = V3, V4 and V11 to V2 and V28 = −5.46 to −4.94 V;
VEEI = V25 to V12 = −5.46 to −4.94 V; VEED and VEEI shorted together; Tamb = 0 to +70 °C; AGND, DGND and IGND
shorted together; VOUT − VOUT = 2 V (p-p); ZL = 50 Ω; unless otherwise specified (typical values measured at
VEEA = VEED = −5.2 V and Tamb = 25 °C).
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Supply
VEEA
VEED
VEEI
IEEA
IEED
IEEI
AGND − DGND
analog supply voltage
digital supply voltage
input stages digital supply voltage
analog supply current
digital supply current
input stages digital supply current
ground voltage differential
note 1
note 1
note 1
note 1
−5.46 −5.20 −4.94 V
−5.46 −5.20 −4.94 V
−5.46 −5.20 −4.94 V
−
108 145 mA
−
60
85
mA
−
10
15
mA
−0.1 −
+0.1 V
Inputs
DIGITAL INPUTS (D9 TO D0) AND CLOCK INPUTS (CLK AND CLK)
VIL
VIH
IIL
IIH
fclk(max)
LOW level input voltage
HIGH level input voltage
LOW level input current
HIGH level input current
maximum clock frequency
VI = −1.8 V
VI = −0.9 V
−1.9 −1.8 −1.6
−1.2 −0.9 −0.8
−
−
10
−
−
20
500 −
−
Outputs (referenced to AGND); notes 1 and 2
VOUT − VOUT
full-scale analog output voltage
(peak-to-peak value)
ZL = 50 Ω
1.7 2.0 2.5
ZO
output impedance
−
50
−
Transfer function
INL
DNL
DC integral non-linearity
DC differential non-linearity
note 3
note 3
−
±0.3 ±0.5
−
±0.2 ±0.45
Spurious free dynamic range (fclk = 500 MHz); VEEA = VEED = 5.2 V; Tamb = 25 °C; note 4; see Fig.3
SFDR
spurious free dynamic range
fOUT = 10 MHz
fOUT = 50 MHz
fOUT = 80 MHz
fOUT = 100 MHz
−65 −69 −
−
−60 −
−
−59 −
−52 −59 −
V
V
µA
µA
MHz
V
Ω
LSB
LSB
dB
dB
dB
dB
1996 Jun 04
6