PHT8N06LT Datasheet, PDF (6/9 Pages) NXP Semiconductors – TrenchMOS transistor Logic level FET

Philips Semiconductors
TrenchMOS™ transistor
Logic level FET
Product specification
PHT8N06LT
6
VDS/V
5
4
3
VDS = 14V
VDS = 44V
2
1
0
0
2
4
6 _QG/nC 8
10
12
Fig.13. Typical turn-on gate-charge characteristics.
V_GS = f(Q_G); conditions: I_D = 7 A; parameter V_DS
40
IF/A
30
Tj/V =
150
25
20
10
0
0
0.5
1 _VSDS/V 1.5
2
Fig.14. Typical reverse diode current.
I_F = f(V_SDS); conditions: V_GS = 0 V; parameter T_j
WDSS%
120
110
100
90
80
70
60
50
40
30
20
10
0
20
40
60
80 100 120 140
Tmb / C
Fig.15. Normalised avalanche energy rating.
W_DSS% = f(T_sp); conditions: I_D = 2.5 A
VGS
0
RGS
L
VDS
T.U.T.
+ ^VDD
-
-ID/100
R 01
shunt
Fig.16. Avalanche energy test circuit.
W_DSS = 0.5 ⋅ LI_D² ⋅ BV_DSS/(BV_DSS − V_DD)
January 1998
6
Rev 1.100