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74F595 Datasheet, PDF (6/13 Pages) NXP Semiconductors – 8-bit shift register with output laches 3-State | |||
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Philips Semiconductors
8-bit shift register with output latches (3-State)
Product specification
74F595
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONSNO TAG
LIMITS
MIN
TYP
NO TAG
MAX
UNIT
VOH
VOL
VIK
II
IIH
IIL
IOZH
±10%VCC
2.5
V
High-level output voltage
Qs
VCC = MIN,
VIL = MAX,
IOH=â1mA
±5%VCC
2.7
3.4
V
Q0âQ7
VIH=MIN
±10%VCC
IOH =â3mA ±5%VCC
2.4
2.7
3.3
V
V
Low-level output voltage
Qs
Q0âQ7
VCC = MIN,
VIL = MAX,
VIH = MIN,
IOL = 20mA
IOL = 24mA
±10%VCC
±5%VCC
±10%VCC
±5%VCC
0.30 0.50
V
0.30 0.50
V
0.35 0.50
V
0.35 0.50
V
Input clamp voltage
VCC = MIN, II = IIK
â0.73 â1.2
V
Input current at maximum input voltage VCC = MAX, VI = 7.0V
100
µA
High-level input current
VCC = MAX, VI = 2.7V
20
µA
Low-level input current
VCC = MAX, VI = 0.5V
â20
mA
Off-state output current,
High level of voltage applied
Q0âQ7
only
VCC = MAX, VO = 2.7V
50
µA
IOZL
Off-state output current,
Low level of voltage applied
Q0âQ7
only
VCC = MAX, VO = 0.5V
â50
µA
IOS
Short-circuit output currentNO TAG
VCC = MAX
â60
â150
mA
ICCH
55
80
mA
ICC
Supply current (total)
ICCL VCC = MAX
70
100
mA
ICCZ
65
95
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
1990 Apr 18
6
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