74F595 Datasheet, PDF (2/13 Pages) NXP Semiconductors – 8-bit shift register with output laches 3-State

Philips Semiconductors
8-bit shift register with output latches (3-State)
Product specification
74F595
FEATURES
• Low noise, now switching feedthrough current
• Controlled output edge rates
• High impedance PNP base inputs for reduced loading
(20µA in High and Low states)
• 8-bit serial-in, parallel-out shift register with storage
• 3-state outputs
• Shift register has direct clear
• Guaranteed shift frequency-DC to 100MHz
DESCRIPTION
The 74F595 contains an 8-bit serial-in, parallel-out shift register that
feeds an 8-bit D-type storage register. The storage register has
parallel 3-State outputs. Separate clocks are provided for both the
shift register and the storage register. The shift register has a direct
overriding clear, serial input and serial output pins for cascading.
Both the shift register and storage register clocks are positive
edge-triggered. If the user wishes to connect both clocks together,
the shift register state will always be one clock pulse ahead of the
storage register.
This device uses patented circuitry to control system noise and
internal ground bounce. This is done by eliminating switching
feedthrough current and controlling both Low-to-High and
High-to-Low slew rates.
PIN CONFIGURATION
Q1 1
Q2 2
Q3 3
Q4 4
Q5 5
Q6 6
Q7 7
GND 8
16 V_CC
15 Q0
14 DS
13 OE
12 STCP
11 SHCP
10 SHR
9 QS
SF01096
TYPE
74F595
TYPICAL f_MAX
130MHz
TYPICAL SUPPLY CURRENT
(TOTAL)
65mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V_CC = 5V ±10%,
T_amb = 0°C to +70°C
16-pin plastic DIP
N74F595N
16-pin plastic SO
N74F595D
PKG DWG #
SOT38-4
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
Ds
Serial data input
SHCP
Shift register clock pulse input (active rising edge)
STCP
Storage register clock pulse input (active rising edge)
SHR
Shift register reset input (active Low)
OE
Output Enable input (active Low)
Qs
Serial expansion output
Q0–Q7
Data outputs
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
74F (U.L.)
HIGH/LOW
1.0/0.033
1.0/0.033
1.0/0.033
1.0/0.033
1.0/0.033
50/33
150/40
LOAD VALUE
HIGH/LOW
20µA/20µA
20µA/20µA
20µA/20µA
20µA/20µA
20µA/20µA
1.0mA/20mA
3.0mA/24mA
1990 Apr 18
2
853–1096 99392